Accepted intel-microcode 3.20171215.1 (source amd64) into unstable
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA512
Format: 1.8
Date: Thu, 04 Jan 2018 23:04:38 -0200
Source: intel-microcode
Binary: intel-microcode
Architecture: source amd64
Version: 3.20171215.1
Distribution: unstable
Urgency: high
Maintainer: Henrique de Moraes Holschuh <hmh@debian.org>
Changed-By: Henrique de Moraes Holschuh <hmh@debian.org>
Description:
intel-microcode - Processor microcode firmware for Intel CPUs
Closes: 886367
Changes:
intel-microcode (3.20171215.1) unstable; urgency=high
.
* Add supplementary-ucode-CVE-2017-5715.d/: (closes: #886367)
New upstream microcodes to partially address CVE-2017-5715
+ Updated Microcodes:
sig 0x000306c3, pf_mask 0x32, 2017-11-20, rev 0x0023, size 23552
sig 0x000306d4, pf_mask 0xc0, 2017-11-17, rev 0x0028, size 18432
sig 0x000306f2, pf_mask 0x6f, 2017-11-17, rev 0x003b, size 33792
sig 0x00040651, pf_mask 0x72, 2017-11-20, rev 0x0021, size 22528
sig 0x000406e3, pf_mask 0xc0, 2017-11-16, rev 0x00c2, size 99328
sig 0x000406f1, pf_mask 0xef, 2017-11-18, rev 0xb000025, size 27648
sig 0x00050654, pf_mask 0xb7, 2017-11-21, rev 0x200003a, size 27648
sig 0x000506c9, pf_mask 0x03, 2017-11-22, rev 0x002e, size 16384
sig 0x000806e9, pf_mask 0xc0, 2017-12-03, rev 0x007c, size 98304
sig 0x000906e9, pf_mask 0x2a, 2017-12-03, rev 0x007c, size 98304
* Implements IBRS and IBPB support via new MSR (Spectre variant 2
mitigation, indirect branches). Support is exposed through cpuid(7).EDX.
* LFENCE terminates all previous instructions (Spectre variant 2
mitigation, conditional branches).
Checksums-Sha1:
c474a75e175c04553cf6cf4a5f1164789117f4ff 1797 intel-microcode_3.20171215.1.dsc
02ef58073ad7e3adbb841e8acd98610aa6d5cb5e 2177512 intel-microcode_3.20171215.1.tar.xz
d7d6f83f656fa33b05cf017132aded03f1e9d7b9 5522 intel-microcode_3.20171215.1_amd64.buildinfo
e4380986b6fb7e023684d4c206229bf852482148 1279728 intel-microcode_3.20171215.1_amd64.deb
Checksums-Sha256:
055a7f5f01644d6793c595f6b90875344ee79a0d4ab1078b7a1aec5c358e59d7 1797 intel-microcode_3.20171215.1.dsc
eca8efc0a6dc456a8723204477e229577c1079fa5c1a10b6ba95d11e261ffa4d 2177512 intel-microcode_3.20171215.1.tar.xz
ffc513983adc997cc938fd30685b8ee56c4257bdce2dd94fa92866cedc3e8017 5522 intel-microcode_3.20171215.1_amd64.buildinfo
78929ffb1de5db97468d0cb9d7bab8e3642e69af1c4c099056faadd9d419f68a 1279728 intel-microcode_3.20171215.1_amd64.deb
Files:
26745f6401d7fe5f63d398793676d5f3 1797 non-free/admin standard intel-microcode_3.20171215.1.dsc
67c3e15bacf2171245243ee0cfde6f1c 2177512 non-free/admin standard intel-microcode_3.20171215.1.tar.xz
869872d5035d458122f325f4318b61eb 5522 non-free/admin standard intel-microcode_3.20171215.1_amd64.buildinfo
9dfc25b786ece3adb849ee570fc14636 1279728 non-free/admin standard intel-microcode_3.20171215.1_amd64.deb
-----BEGIN PGP SIGNATURE-----
iQIzBAEBCgAdFiEEq7GuO+cOOhDUp+2l/hG/posVjpgFAlpOz74ACgkQ/hG/posV
jpjg+RAApwUKVdy7gfGrDgHejvzFU8Uvg1/1R40YyKWeJ5hnik5soyIhEtnFj4nC
JoFKf+jSRgmzx7JdUubWfpeJsyxgR/HcUjwf8PzDjCzMWbkz5K8U9MPinsf5ngC8
clLFhPO4r17CBVV8MiWy0vAnaL1zalmUtAG23SvIsBRrJWs41mP1D9Yud1kzILwE
s3hXsTXnKpQxwxqsV1+ze1ZhJvDd3AEXhblXatRKcy7Wvg2w8QXkwpBF7RqZ5CxL
KSHwZJlVwA0a4LmM/v7W5gRcGh7lY0AqhqViA3Tns5U4V5NOSPV3/ApSZgSWUWRG
DihJh2BIR/2K8vrHX2H5YJi1pq9c+S/dGFlpXDF6omrCexTfBoAQRVNMmw11xFjI
3gPfHGB2kggNS8vkrM2Z6X4o48y24zfBacmg2terM/0ITfI/sW2W5s63ltP05qya
CAj7MWDIYcaifR6SqyL0ofv8zaCG0jwTb+hrshXbihPbjJxiYN5yWlK+5VgqhP+3
6oPSO09Mt5meERBUWGq+SFA+S1diKv/Zu6Ak+uut6j2LivqkBVrf4L1BGt8LHHXB
FgLaI2+zH2IgeQWFGETWUlA33Xd3lABlROtpLmqDMShrw651t8qnuV7IPu8sV4sY
UhfUNNY9Lu44NDM36ctIX9BQluaaaXTvPpZ99T7hp0X/filQl9U=
=cSdS
-----END PGP SIGNATURE-----